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document number: mma6281qt rev 1, 06/2007 freescale semiconductor technical data ? freescale semiconductor, inc. , 2005-2007. all rights reserved. 2.5g - 10g two axis low-g micromachined accelerometer the mma6281qt low cost capacitive micromachined accelerometer features signal conditioning, a 1-pole low pass filter, temperature compensation and g- select which allows for the selection among 4 sensitivities. zero-g offset full scale span and filter cut-off are factory set and require no external devices. includes a sleep mode that makes it idea l for handheld battery powered electronics. features ? selectable sensitivit y (2.5g/3.3g/6.7g/10g) ? low current consumption: 500 a ? sleep mode: 3 a ? low voltage operation: 2.2 v ? 3.6 v ? 6mm x 6mm x 1.45mm qfn ? fast turn on time ? high sensitivity (2.5 g) ? integral signal conditioning with low pass filter ? robust design, high shocks survivability ? environmentally preferred package ? low cost typical applications ? portable applications: tilt monitoring anti-theft ? vibration monitoring and recording: appliance balance, seismic, smart motors) ? pedometer: motion sensing ? pda: text scroll ? navigation and dead reckoning: e-compass tilt compensation ? gaming: tilt and motion sensing, event recorder ? robotics: motion sensing ? impact monitoring (shipping, handling, black box event recorder) ordering information device temp. range case no. package mma6281qt ? 40 to +105c 1622-02 qfn-16, tray mma6281qr2 ? 40 to +105c 1622-02 qfn-16,tape & reel mma6281qt 16-lead qfn case 1622-02 mma6281qt: xz axis accelerometer 2.5g/3.3g/6.7g/10g bottom view figure 1. pin connections top view 15 16 14 13 12 11 10 1 2 3 4 5678 9 g-select1 n/c n/c n/c g-select2 v dd v ss n/c n/c n/c n/c n/c n/c x out z out sleep mode
sensors 2 freescale semiconductor mma6281qt figure 2. simplified accelerometer functional block diagram electro static discharge (esd) warning: this device is se nsitive to electrostatic discharge. although the freescale accelerometer contains internal 2000 v esd protection circuitry, extra precaution must be taken by the user to protect the chip from esd. a charge of over 2000 volts can accumulate on the human body or associated test equipment. a charge of this magnitude can alter the performance or cause failure of the chip. when handling the accelerometer, proper esd precautions should be followed to avoid exposing the device to discharges which may be detrimental to its performance. table 1. maximum ratings (maximum ratings are the limits to which the device can be exposed without causing permanent damage.) rating symbol value unit maximum acceleration (all axis) g max 2000 g supply voltage v dd ?0.3 to +3.6 v drop test (1) 1. dropped onto concrete surface from any axis. d drop 1.8 m storage temperature range t stg ?40 to +125 c v ss z out x out g-select1 g-select2 sleep mode v dd g-cell sensor oscillator clock generator x-temp comp z-temp comp c to v converter gain + filter control logic eeprom trim circuits
sensors freescale semiconductor 3 mma6281qt table 2. operating characteristics unless otherwise noted: ?20c < t a < 85c, 2.2 v < v dd < 3.6 v, acceleration = 0g, loaded output (1) characteristic symbol min typ max unit operating range (2) supply voltage (3) supply current supply current at sleep mode (4) operating temperature range acceleration range, x-axis, z-axis g-select1 & 2: 00 g-select1 & 2: 10 g-select1 & 2: 01 g-select1 & 2: 11 v dd i dd i dd t a g fs g fs g fs g fs 2.2 ? ? ?40 ? ? ? ? 3.3 500 3 ? 2.5 3.3 6.7 10.0 3.6 800 10 +105 ? ? ? ? v a a c g g g g output signal zero-g (t a = 25c, v dd = 3.3 v) (5) zero-g (4) x-axis z-axis sensitivity (t a = 25c, v dd = 3.3 v) 2.5g 3.3g 6.7g 10g sensitivity (4) x-axis z-axis bandwidth response x z v off v off , t a v off , t a s 2.5g s 3.3g s 6.7g s 10g s,t a s,t a f -3db f -3db 1.485 2.6 (6) 1.0 (6) 444 333 167 111 0.02 (6) 0.01 (6) ? ? 1.65 0.6 0.8 480 360 180 120 0.02 0.00 350 150 1.815 3.8 (7) 0.8 (7) 516 387 193 129 0.02 (7) 0.01 (7) ? ? v mg/c mg/c mv/g mv/g mv/g mv/g %/c %/c hz hz noise rms (0.1 hz ? 1 khz) (4) power spectral density rms (0.1 hz ? 1 khz) (4) n rms n psd ? ? 3.0 350 ? ? mvrms g/ control timing power-up response time (8) enable response time (9) sensing element resonant frequency x z internal sampling frequency t response t enable f gcell f gcell f clk ? ? ? ? ? 1.0 0.5 6.0 3.4 11 2.0 2.0 ? ? ? ms ms khz khz khz output stage performance full-scale output range (i out = 30 a) v fso v ss +0.25 ? v dd ?0.25 v nonlinearity, x out , z out nl out ?1.0 ? +1.0 %fso cross-axis sensitivity (10) v xz ?? 5.0 % 1. for a loaded output, the measurements are observed after an rc filter consisting of a 1.0 k ? resistor and a 0.1 f capacitor on v dd -gnd. 2. these limits define the range of operation fo r which the part will meet specification. 3. within the supply range of 2.2 and 3.6 v, the device operates as a fully calibrated linear accelerometer. beyond these supply limits the device may operate as a linear device but is not guaranteed to be in calibration. 4. this value is measured with g-select in 2.5g mode. 5. the device can measure both + and ? acceleration. with no input acceleration the output is at midsupply. for positive acceler ation the output will increase above v dd /2. for negative acceleration, the output will decrease below v dd /2. 6. these values represent the 10th percentile, not the minimum. 7. these values represent the 90th percentile, not the maximum. 8. the response time between 10% of full scale v dd input voltage and 90% of the final operating output voltage. 9. the response time between 10% of full scale sleep mode input voltage and 90% of the final operating output voltage. 10. a measure of the device?s ability to reject an acceleration applied 90 from the true axis of sensitivity. hz
sensors 4 freescale semiconductor mma6281qt principle of operation the freescale accelerometer is a surface-micromachined integrated-circuit accelerometer. the device consists of two surface micromachined capacitive sensing cells (g-ce ll) and a signal conditioning asic contained in a single integrated circuit package. the sensing elements are sealed herm etically at the wafer level using a bulk micromachined cap wafer. the g-cell is a mechanical structure formed from semiconductor materials (postillion) using semiconductor processes (masking and etching). it can be modeled as a set of beams attached to a movable central mass that move between fixed beams. the movable beams can be deflected from their rest position by subjecting the system to an acceleration ( figure 3 ). as the beams attached to the central mass move, the distance from them to the fixed beams on one side will increase by the same amount that the distance to the fixed beams on the other side decreases. the change in distance is a measure of acceleration. the g-cell beams form two back-to-back capacitors ( figure 3 ). as the center beam mo ves with acceleration, the distance between the beams changes and each capacitor's value will change, (c = a /d). where a is the area of the beam, is the dielectric consta nt, and d is the distance between the beams. the asic uses switched capacitor techniques to measure the g-cell capacitors and extract the acceleration data from the difference between the two capacitors. the asic also signal conditions and filters (s witched capacitor) the signal, providing a high level output vo ltage that is ratiometric and proportional to acceleration. figure 3. simplified transducer physical model special features g-select the g-select feature allows for the selection among 4 sensitivities present in the device. depending on the logic input placed on pins 1 and 2, the device internal gain will be changed allowing it to function with a 2.5g, 3.3g, 6.7g, or 10g sensitivity ( table 3 ). this feature is ideal when a product has applications requiring different sensitivities for optimum performance. the sensitivit y can be changed at anytime during the operation of the product. the g-select1 and g- select2 pins can be left unconnected for applications requiring only a 2.5g sensitivit y as the device has an internal pull-down to keep it at that sensitivity (480 mv/g). sleep mode the 2 axis accelerometer provides a sleep mode that is ideal for battery operated products. when sleep mode is active, the device outputs are turned off, providing significant reduction of operating current. a low input signal on pin 12 (sleep mode) will place the device in this mode and reduce the current to 3 a typ. for lower power consumption, it is recommended to set g-select1 and g-select2 to 2.5g mode. by placing a high input signal on pin 12, the device will resume to normal mode of operation. filtering the 2 axis accelerometer contains onboard single-pole switched capacitor filt ers. because the filter is realized using switched capacitor techniques, there is no requirement for external passive components (resistors and capacitors) to set the cut-off frequency. ratiometricity ratiometricity simply means the output offset voltage and sensitivity will scale linearly with applied supply voltage. that is, as supply voltage is increa sed, the sensitivity and offset increase linearly; as supply voltage decreases, offset and sensitivity decrease linearly. this is a key feature when interfacing to a microcontrolle r or an a/d converter because it provides system level cancella tion of supply induced errors in the analog to digital conversion process. acceleration table 3. g-select pin descriptions g-select2 g-select1 g-range sensitivity 0 0 2.5g 480 mv/g 0 1 3.3g 360 mv/g 1 0 6.7g 180 mv/g 1 1 10g 120 mv/g
sensors freescale semiconductor 5 mma6281qt basic connections pin descriptions figure 4. pinout description figure 5. accelerome ter with recommended connection diagram pcb layout figure 6. recommended pcb layout for interfacing accelerometer to microcontroller notes: 1. use 0.1 f capacitor on v dd to decouple the power source. do not exceed capacitor values of 2.2 or 3.3 f. slow dv/dt rise times on v dd may cause the device to not power up below 0 c.to ensure operation below 0 c ensure v dd line has the ability to reach 2.2v in < 0.1 ms as measured on the device at the v dd pin. if output signal does not assert itself, then the dv/dt at the v dd pin of the device should be measured. 2. physical coupling distance of the accelerometer to the microcontroller should be minimal. 3. the flag underneath the package is internally connected to ground. it is not recommended for the flag to be soldered down. 4. place a ground plane beneath the accelerometer to reduce noise, the ground plane should be attached to all of the open ended terminals shown in figure 6 . 5. use an rc filter with 1.0 k ? and 0.1 f on the outputs of the accelerometer to minimize clock noise (from the switched capaci tor filter circuit). 6. pcb layout of power and ground should not couple power supply noise. 7. accelerometer and microcontroller should not be a high current path. 8. a/d sampling rate and any external power supply switching frequency should be selected such that they do not interfere with the internal accelerometer sampling frequency (11 khz for the sampling frequency). this will prevent aliasing errors. 9. pcb layout should not run traces or vias under the qfn part. this could lead to ground shorting to the accelerometer flag. table 4. pin descriptions pin no. pin name description 1 g-select1 logic input pin to select g level. 2 g-select2 logic input pin to select g level. 3v dd power supply input 4v ss power supply ground 5 - 7 n/c no internal connection. leave unconnected. 8 - 11 n/c unused for factory trim. leave unconnected. 12 sleep mode logic input pin to enable product or sleep mode. 13 z out z direction output voltage. 14 n/c no internal connection. leave unconnected. 15 x out x direction output voltage. 16 n/c no internal connection. leave unconnected. top view 15 16 14 13 12 11 10 1 2 3 4 5678 9 g-select1 n/c n/c n/c g-select2 v dd v ss n/c n/c n/c n/c n/c n/c x out z out sleep mode sleep mode v dd v ss 3 4 v dd 0.1 f 0.1 f 15 12 x out 1 k ? logic input 2 1 0.1 f 13 z out 1 k ? logic inputs g-select2 g-select1 mma6281qt power supply v dd v ss sleep mode g-select1 g-select2 x out z out accelerometer v dd v ss v rh p0 p1 p2 a/d in a/d in c c c r r c c microcontroller c c
sensors 6 freescale semiconductor mma6281qt 15 16 14 13 12 11 10 1 2 3 4 5678 9 +x dynamic acceleration -x top view 16-pin qfn package static acceleration direction of earth?s gravity field.* x o u t @ 0 g = 1 . 6 5 v z o u t @ 0 g = 1 . 6 5 v x out @ -1g = 1.17 v z out @ 0g = 1.65 v x out @ 0g = 1.65 v z out @ 0g = 1.65 v x out @ +1g = 2.13 v z out @ 0g = 1.65 v * when positioned as shown, the earth?s gr avity will result in a positive 1g output. side view top bottom : arrow indicates direction of mass movement. top view side view x out @ 0g = 1.65 v z out @ +1g = 2.13 v x out @ 0g = 1.65 v z out @ -1g = 1.17 v in 2.5g mode top view -z +z
sensors freescale semiconductor 7 mma6281qt minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the surface mount packages must be the correct size to ensure proper solder connection interface between the board and the package. with the correct footprint, the packages will self-align when subjected to a solder reflow process. it is always recommended to design boards with a solder mask layer to avoid bridging and shorting between solder pads. the flag underneath the package is internally connected to ground. it is not recommended for the flag to be soldered down. pcb design guidelines the following are the recommended guidelines to follow for mounting qfn sensors for ei ther automotive or consumer applications. 1. nsmd (non solder mask defined) is shown in figure 7 . 2. solder mask opening = pcb land pad +0.1 mm. 3. stencil aperture size = pcb land pad ? 0.025mm, as shown in figure 8 with a 6 mil stencil. 4. do not place insertion components or vias at a distance less than 2mm from the package land area. 5. signal trace connected to pads should be as symmetric as possible. put dummy traces if there is nc pads, in order to have same length of exposed trace for all pads. signal traces with 0.1mm width and min. 0.5mm length for all pcb land pad near package are recommended as shown in figure 7 and figure 8 . wider trace can be continued after the 0.5mm zone. 6. use a standard pick and place process and equipment (no hand soldering process). 7. it is recommended to use a cleanable solder paste with an additional cleaning step after smt mount 8. it is recommended to avoid screwing down the pcb to fix it into an enclosure since this may cause the pcb to bend. 9. pc boards should be rated for multiple reflow of lead- free conditions with 260c maximum temperature. \ figure 7. nsmd solder mask design guidelines ? do not solder down flag for consumer application ? do not place metal pattern or via structures underneath of package 0.55 mm 0.50 m m package pad pcb land pattern - nsmd cu: 0.55 x 0.50 mm sq. solder mask opening = pcb land pad +0.1mm =0.65x0.60 mm sq. signal trace 0.1mm width and 0.5mm (min) length near package. wider trace can be continued after these traces.
sensors 8 freescale semiconductor mma6281qt figure 8. stencil design guidelines stencil opening (black) for land pad (yellow) = pcb landing pad -0.025mm = 0.525mmx0,475mm package foot pirnt signal trace near package: 0.1mm width and 0.5mm (min) length are recommended near package. wider trace can be continued after these.
sensors freescale semiconductor 9 mma6281qt package dimensions case 1622-02 issue b 16-lead qfn page 1 of 3
sensors 10 freescale semiconductor mma6281qt package dimensions case 1622-02 issue b 16-lead qfn page 2 of 3
sensors freescale semiconductor 11 mma6281qt package dimensions case 1622-02 issue b 16-lead qfn page 3 of 3
mma6281qt rev. 1 06/2007 information in this document is provided solely to enable system and software implementers to use freescale semiconduc tor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability ar ising out of the application or use of any product or circuit, and specifically discl aims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data s heets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale se miconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the fa ilure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemni fy and hold freescale semiconductor and its officers, employees, subsidiaries, affili ates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale? and the freescale logo are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. ? freescale semiconductor, inc., 2005-2007. all rights reserved. how to reach us: home page: www.freescale.com web support: http://www.freescale.com/support usa/europe or locations not listed: freescale semiconductor, inc. technical information center, el516 2100 east elliot road tempe, arizona 85284 +1-800-521-6274 or +1-480-768-2130 www.freescale.com/support europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) www.freescale.com/support japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor hong kong ltd. technical information center 2 dai king street tai po industrial estate tai po, n.t., hong kong +800 2666 8080 support.asia@freescale.com for literature requests only: freescale semiconductor literature distribution center p.o. box 5405 denver, colorado 80217 1-800-441-2447 or 303-675-2140 fax: 303-675-2150 ldcforfreescalesemiconductor@hibbertgroup.com rohs-compliant and/or pb-free versions of freescale products have the functionality and electrical characteristics of their non-rohs-compliant and/or non-pb-free counterparts. for further information, see http:/www.freescale.com or contact your freescale sales representative. for information on freescale?s environmental products program, go to http://www.freescale.com/epp.

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